ID:

SW-1

TITLE:

UTED – Ultrasonic Trajectory Estimation Device

(a signal processing theme)

DESCRIPTION:

The UTED is a device used for measuring the speed, size and launch velocity of a projectile, and to gauge its final endpoint. The diagram below illustrates the problem. There is certain amount of flexibility, and scalability of scope, for this project.

Figure: Visual view of the trajectory problem

The baseline system is planned around development using a PIC32 prototyping board and ultrasonic sensor. The projectiles will need to be sufficiently large and reflective of ultrasonic waves, in order to work effectively with low cost components. For example, launching a basketball from a simple catapult, with the particular weight and size of the ball know, can be used as an initial starting point to characterize the problem, which can be later expanded to incorporate other types of projectiles, such as boxes, 2L Coke bottles, empty beer bottles, stones, and a broader variety of things that are easy to find. Also see: VTED (similar project using visual instead of ultrasonic sensors).

DELIVERABLES:

Operational prototype assembled using either combination of evaluation board and veriboard circuit, or a prototype pcb of your own design. Adequate GUI to display results.

SKILLS/REQUIREMENTS:

Signal processing, Electronics, Microcontroller programming, C programming

EXTRA INFORMATION:

AREA:

Embedded Systems, Signal processing, C/C++ programming

ID:

SW-2

Supervisors: S. Winberg & G. De Jager

TITLE:

RPSFSS – Raspberry Pi Sensor Fusion Security System

DESCRIPTION:

The Raspberry Pi is a low cost ARM-based single board computer system that is well supported by the Linux operating system. The platform provides a variety of useful ports, such as HDMI graphics, USB and Ethernet. The objective of this project is to create an ‘intelligent’ security system using the Raspberry Pi. The project is to contribute artificial intelligence / machine learning code and experimental findings, also application code, to the Raspberry PI interest group (see site at: http://www.dovgalecs.com/Vlads_spot/Raspberry_Pi.html). The student doing this project is encouraged to contact this interest group, tell them about the project, become familiar with their mission plans, and obtain and build on any existing support code they have.

Figure: Raspberry Pi platform

For this project, standard off-the-shelf webcams should be used for surveillance, intruder detection and system activation/deactivation. If time permits, acoustic detection and alarm triggering will be added, constituting a sensor fusion aspect to this project as a means to validate alarm conditions and authorization for configuration changes.

Further info related to the design tasks:

A suitable enclosure needs to be built. The alarm system can be powered via mains using a standard USB cellphone charger. Audio input can be provided via a microphone circuit to the analogue in GPIO line. The system should work on a home network; an Ethernet to Wifi switch can be provided to connect to a home wireless Wifi network. A web-based interface to the system needs to be implemented for configuration, to activate/deactivate alarms, and to check alarm conditions. Email messages for alarm should also be provided. It is the student’s responsibility to come up with creative approaches to implement the system and sensor fusion techniques.

DELIVERABLES:

Raspberry PI integrated into a suitable enclosure

Completed security system with suitable testing environment

Security software, User manual

SKILLS/REQUIREMENTS:

Programming; Embedded systems.

EXTRA INFORMATION:

See the Raspberry Pi website at: http://www.raspberrypi.org/

AREA:

Computer Engineering / Mechatronics (provided student has good programming ability)

ID:

SW-3

TITLE:

RMB - Retro Morsecode Box

(a music theme project)

DESCRIPTION:

This is another one for those interested in music, but for also for people with an appreciation for history and classic electronics. You certainly don't need to be good at music for this project. The aim of the Retro Morsecode Box (or RMB) is to revisit the exciting bygone erra of mosecode and telegraphs. You have an option of either creating a wireless morse code device, which you can use a walkie-talkie (or appropriately configured radio received) to listen to your beep boop tunes. Alternatively, you can develop a wired system to listen to your RMB transmissions, in which case you'll probably need to create a prototype PCB (e.g. using breadboards or veriboard), one for sending and the other for receiving (you don't need to do two-way comms). You'll need to do some tests to see what kind of distance you can get, how well the signals can travel through walls, etc. If you want to take it further you can hook up PCs to control the sending and receiving of data as Morse code (i.e., replacing the human operator by a machine). The diagram below suggests what is needed.

Figure: Illustration of the RMB Device

Disclaimer:  transmission power for the RMB device will need to be low, and on a suitable FSR / unlicensed band so that it doesn't cause unauthorised interferece with elecronic equipment (hence the suggestion to use the walkie-talkie radio channel).

DELIVERABLES:

Prototyped RMB device. Demonstrate sending and receiving of morsecode signals. Report on distance tests (part of thesis).

SKILLS/REQUIREMENTS:

Electronics, microcontroller programming, C programming

EXTRA INFORMATION:

AREA:

Electronics, Embedded systems

ID:

SW-4

TITLE:

RWTM - Rhino Wireless Transceiver Module
(a Reconfigurable Computing theme project)

DESCRIPTION:

The Rhino project is a reconfigurable computing platform designed for Software Defined Radio (SDR) applications. The Rhino platform was built at UCT by the SDRG research group (see the www.rhinoplatform.org Rhino site for details).
The objective of the RWTM system is to develop a wireless transceiver module for the Rhino, a low-power FM transmitter/ receiver that can send and received bytes of data. A speed such as 16KBps, using a simple whip antenna, may be adequate to prove the concept. It is hoped that the HDL and other code developed as a results of this project will contribute support resources and examples for the Rhino support kit.

DELIVERABLES:

Prototyped antenna and analogue front-end (which connects to a A2D sampling module), VHDL/Verilog code for the front-end processing and Wireless communications protocol handling.

SKILLS/REQUIREMENTS:

Embedded systems; HDL coding; digital single processing; a reasonable understanding of signals and RF transmissions (although much of the RF skills you can pick up as part of doing this project)

EXTRA INFORMATION:

AREA:

Digital systems; Electronics

ID:

SW-5

TITLE:

SwaMURAy – Swapping Memory Unit for Radio Astronomy  (a Reconfigurable Computing theme project)
Co-supervised by: Wesley New (SKA office)

DESCRIPTION:

This project focuses on developing a portable signal processing firmware service useful for Radio Astronomy (RA) processing purposes. RA usually needs to deal with big data volumes, what have usually been pre-correlated as shown in the figure below. A cluster of reconfigurable computing platforms can be an effective means to deal with large volumes of data by doing special-purpose processing on it in parallel at high speed. This is the case for many radio astronomy data processing centres, including the one for the South African Square Kilometre Array (SKA).

Figure: How the SwaMURAy module fits in

A common method for RA signal processing application involves the simultaneous, or overlapping, acquisition of data and processing of previously acquired signals. Essentially, this involves two (or more) blocks of memory. Digitized signals from an ADC (or network) is saved to the first block. When the block is full, processing is applied to this block (e.g. an FFT) and the data being received is switched to writing to the second block. Similarly, when the second block is full, processing is applied to it which data reverts to being written to the first block and so on.

This project has the following objectives: 1) implement code to read and write to DDR3 memory on ROACH/Rhino; 2) develop simultaneous sampling and memory swapping scheme; and 3) determine the speed that HDL-based Fourier transforms can be done and the resultant transform produced while overlapped with the sampling operation.

Students doing this project may need to have occasionally meetings at the SKA office in Pinelands in order to refine the specifications, obtain sample code and data, and to show & discuss progress.

What is ROACH and what is Rhino?

The ROACH platform (see: https://casper.berkeley.edu/wiki/ROACH) is a reconfigurable computing platform used in many radio astronomy data processing centres. The Rhino platform (www.rhinoplatform.org) is a lower cost reconfigurable platform intended as a training platform for RA processing and to facilitate progression towards use of ROACH. Rhino can serve as an alternate platform for RA applications.

DELIVERABLES:

1. Well document code modules for: a) DDR3 memory access; b) memory swapping control; c) FFT processing operation.

2. Prototyped processing system running on either ROACH or Rhino.

SKILLS/ REQUIREMENTS:

Embedded systems; HDL coding; digital single processing.

EXTRA INFORMATION:

AREA:

Computer engineering / Digital systems

ID:

SW-6

TITLE:

PRTF - Populating the Rhino Toolflow Framework

DESCRIPTION:

The Rhino toolflow describes the development process by which a design for signal processing operations is transformed through a sequece of engineering tasks into an executable implementation that runs on the Rhino. It is envisioned that that the framework designed will be populated with common signal processing components such as filters, mixers, signal sources etc, all of which are fairly primitive building-block structures used in most signal processing operations. Consequently, this project is concerned with the creation of a subset of these components, and implementing and testing these on a Rhino board (or compatable FPGA platform). These signal processing routes could be written in MyHDL or VHDL / Verilog. Suitable documentation and integration procedures will need to be defined and explained in the thesis.

Acknowledgement: Thanks to Gordon Inggs for suggesting this idea.

DELIVERABLES:

toolset of signal processing routines written in an HDL

SKILLS/REQUIREMENTS:

FPGA application development, HDL coding

EXTRA INFORMATION:

AREA:

Digital systems, FPGAs 

ID:

SW-7

TITLE:

mVAIS – Vision-based Alignment and Image transfer System (An image processing theme)

DESCRIPTION:

This project is done in collaboration with EDH Sports, a company that has an engineering division in Stellenbosch’s Technopark.

In brief, this project involves writing embedded code, which will run on a platform developed by EDH, and will interface to an Omnivision high-performance camera (OV5640). The code needs to stream video to a host computer, and a special-purpose visual-based alignment algorithm needs to be implemented on the PC (once the streaming is working) and then tested comprehensively.

The embedded platform comprises a special-purpose ARM processor (developed by Variscite http://www.variscite.com/). For this development work, the prototyping module VAR-SOM-OM44 illustrated below will be used. The module has a CPI interface to the OV5640 5Mp camera.

There will be support available from EDH, both in terms of in-person meetings and email, also trialling/demoing solutions at their labs with an industry expert to proffer advice.

DELIVERABLES:

Operational streaming of video from the OV5640 via the ARM to a PC host application.

Operational alignment program running on host computer.

Code repository, with neatly documented code

SKILLS/REQUIREMENTS:

Hardware/Software interfacing. Understanding of signal processing techniques. Numerical methods.

EXTRA INFORMATION:

AREA:

Computer engineering. Signal proc., networks (sockets), embedded s/w

ID:

SW-8  
Co-supervisor: C. Tong (PhD student)

TITLE:

Porting of the Commensal Radar Processing Server from a CUDA implementation to standard multi-threaded CPU implementation  (image processing theme)

DESCRIPTION:

The UCT Commensal Radar (CR) project (http://www.cr.uct.ac.za) currently makes use of a CUDA-accelerated processing server application to perform the signal-processing necessary to detect aircraft. The aim of this project is to port the CUDA portions of the server code to standard CPU code to run on a typical desktop or laptop processor to allow processing of data when a GP-GPU device is not available.

A module diagram of the processing server is shown below. The student is required to re-write the Processing module. This block consists of several calls to CUDA-BLAS routines as well as some hand-written arithmetic routines. These need be changed to CPU implementations of BLAS and/or hand-written routines. There is plenty of real radar data available to test the implementation as well as several multicore hardware platforms.

DELIVERABLES:

Operational CPU / non-CUDA implementation of the CR routine

SKILLS/REQUIREMENTS:

C++, Threaded programming, Cuda, Linux, matrix algebra, some basic knowledge of DSP.

EXTRA INFORMATION:

AREA:

Computer engineering, algorithm development, Signal processing

ID:

SW-9

TITLE:

VTED – Visual Trajectory Estimation Device

(an image processing theme)

DESCRIPTION:

The VTED is a device used for measuring the speed, size and launch velocity of a projectile, and to gauge its final endpoint. A nice thing about this project is that it aims to use a standard PC and (fast) webcam (i.e., a 40+ fps PlayStation eye webcam). The requirements for this project are largely the same as those for the ultrasonic-based UTED project above – but they two projects use extensively different signal processing operations (if someone else chooses SW-1, you are encouraged to collaborate with them, which the supervisor of this project will elaborate to ensure each project has the necessary substantive amount of individual work). Indeed, the point of advertising the two projects is to stimulate a bit of competition: will UTED work better than VTED?!

The diagram below illustrates the trajectory problem. There is some flexibility and scalability of scope for this project.

Figure: Visual view of the trajectory problem

The baseline system for this project planned around development and deployment on the same machine, a standard PC with a webcam attached. The projectiles will need to be sufficiently large and in order to work effectively with the camera system (the PS Eye is fast but quite low res). For example, launching a nice bright rubber ball from a simple catapult, with the particular weight and size of the ball know, can be used as an initial starting point to characterize the problem, which can be later expanded to incorporate other types of projectiles, such as darts, tennis balls, plastic bottles, beer bottles, stones, and a broader variety of other things. Also see: UTED above.

DELIVERABLES:

Software implementing VTED. Short manual explaining how to use it.

SKILLS/REQUIREMENTS:

Signal processing, C/C++ programming

EXTRA INFORMATION:

AREA:

Electronics, Embedded systems

ID:

SW-10

TITLE:

Golf Ball Launch Angle Calculator (GBLAC)

(an image processing theme)

DESCRIPTION:

If you’re interested in golf, or in a sporting and peaceful equivalent of launching missiles, then this project is for you. The objective of this project is to calculate the launch angle of a golf ball by ‘seeing’ (from a camera) where it ends up in a wall coated with sponge memory foam. This project is done in collaboration with EDH Sport, a company that has a development division in the Stellenbsoch Technopark (see transport issues below).

The system is intended to work as illustrated below. Essentially, a webcam continuously monitors the wall of memory foam. When a new hole appears in the wall (from a golf ball hitting it) the launch trajectory needs to be calculated (from the initial conditions that are to be configured via a GUI). Ideally, a sound trigger should be built into the system which starts the processing when the sound of the golf club hitting the ball is detected.

Figure: parts of the golf launch angle system

While it is desirable for this system to work with a standard webcam using either Android or on a Mac laptop, depending on the available computing resources, it would be acceptable to have the system working on a Microsoft Windows platform.

Transport concerns: Occasional meetings and experimentation with a good golfer will be necessary; it would therefore be an advantage to the student if he/she has a car; reimbursement of travel expenses to Technopark can be made.

DELIVERABLES:

Operational GBLAC software application with easy to use GUI

Short user manual explaining how to use the program

Code neatly arranged into a project archive on CD.

SKILLS/REQUIREMENTS:

Signal processing, C/C++ programming

EXTRA INFORMATION:

AREA:

Programming, GUI, some device driver interfacing to use webcam

ID:

SW-11

TITLE:

FLORA – Fynbos Leaf-based Online Recognition Application V.3

DESCRIPTION:

This project relates to performing image-processing and communications. The proposed product involves two parts: a cellphone or digital camera, referred to as the Image Capture Device (ICD) and a central processing server (CPS). The ICD will acquire an image of a leaf from a Fynbos plant; this image will be sent to the CPS for identification. The CPS will then attempt to identify the leaf based on matching its colour and shape, among other techniques, to a database of leaf characteristics and patterns. If the CPS is able to perform a match, it will send back a match accuracy measure (a percentage value indicating how likely the match is), of no matches are found, the CPS will send back a message indicating that the plant was not found and that the image has been tagged for a human expert to attempt to determine what plant the image represents. In the prototype version of the FLID, the connection between ICD and CPS will require manual intervention, such as the users needing to download the image from cellphone/camera and manually loading the image into the CPS program to identify the image. Furthermore, the prototype will be configured and tested with a relatively small set of samples which can be easily found around campus. This project is most suited for a student who's willing to spend some time in the outdoors looking for, and photographing plant specimens. A certain amount of literature review will be needed to become familiar with commonly used image-processing techniques needed for pattern matching algorithms. Future work plans could include having a both the ICD and CPS running as a cellphone application so that the identification can be performed without the need for a communications link.

A start has been made on FLORA, viewable at: http://forge.ee.uct.ac.za/flora/

If you choose to work on this project, you can take it further.

DELIVERABLES:

Application running on an embedded platform or on a mobile computer or on a smartphone

SKILLS/REQUIREMENTS:

C / C++ programming (some experience with image processing is recommended but not essential)

EXTRA INFORMATION:

AREA:

Digital image processing, signal processing

ID:

SW-12

TITLE:

Implementation of Numberplate Recognition on the Raspberry PI Architecture

DESCRIPTION:

The aim of this project is to prototype a low-cost real-time number-plate recognition system, on the Raspberry PI platform. The project will be built using custom C++ implementations and the OpenCV (Open Source Computer Vision) libraries.

The Raspberry PI is a credit card sized single board computer, originally designed for teaching computer science in schools, which has now been used in many applications in various sectors, from education to engineering to entertainment.

The board features a 700 MHz ARM based processor, 512MB ram, RCA and HDMI video output, 3.5mm sound output, two USB ports, an ethernet port, and a number of digital I/O pins. This low cost board can run ARM ported, heavily scaled linux distributions.

DELIVERABLES:

Prototype of number plate recognition running on the Raspberry Pi. Report documenting the methods used in this implementation, along with testing and analysis of system performance.

SKILLS/REQUIREMENTS:

Computer Science, C++, Embedded Systems, Engineering Design, GUI Design, Image Processing, Operating Systems

EXTRA INFORMATION:

Reserved for Steve Bissett

See Also:

·         Engers, Ross -  Realtime Optical Vehicle Entry/Exit Recognition: An application for vehicle numberplate recognition, University of Cape Town 2012

·         Raspberry PI (Official Website): http://www.raspberrypi.org/

·         OpenCV (Official Website): http://opencv.org/

AREA:

Electrical and Computer Engineering, Embedded Systems, Computer Science, Operating Systems

ID:

SW-13 

TITLE:

O2LD3P – Open-source & Open-plan Large-scale Dimensiones des 3 Printer (part A)
supervisors: S. Winberg & S. Ginsberg

DESCRIPTION:

This project concerns the construction, development of driver code, and testing of a large-scale 3D printer system.  This is a rather ambitious project, and we would need at least two students to work on it. There is plenty scope for multiple projects related to this, that is why there are two topic numbers allocated to this ‘meta-project’. The overall project has been divided into two parts: Part A is development of the physical printer system and its control electronics; Part B is development of the software control part and integration with a drawing program. Another, part, largely focused on programming, would need to be done for a Part C. This project is to be done in collaboration with DELtronics, who will fund the necessary parts and equipment and have also offered the availability of lab space needed to assemble the machine. Plans on what parts can be worked on where (i.e., on campus or at DELtronics) and transport issues would need to be negotiated with your supervisor and the DELtronics representative.

Figure: Rough diagram of how the printer might look

The figure above suggests the printer structure. Further insights into how the printer and its control software is to be developed will need to be discussed in detail with the various parties concerned.

DELIVERABLES:

Prototyped 3D printer, demonstrating operation (done in conjunction with project partner)

SKILLS/REQUIREMENTS:

Mechanical design and construction; programming

EXTRA INFORMATION:

AREA:

Mechatronics

ID:

SW-14

TITLE:

O2LD3P – Open-source & Open-plan Large-scale Dimensiones des 3 Printer (part B)
supervisors: S. Winberg & S. Ginsberg

DESCRIPTION:

This project concerns the construction, development of driver code, and testing of a large-scale 3D printer system.  See SW-11 for further detail on the overall project concern.

This part, Part B, focuses on development of the software control part of the O2LD3P project and integration with a drawing program. The code produced is intended to be made open-source and placed in a suitable repository on completion, such as sourceforge.net.

This project is to be done in collaboration with DELtronics. Plans on what parts can be worked on where (i.e., on campus or at DELtronics) and transport issues would need to be negotiated with your supervisor and the DELtronics representative. Further insights into this part of the project need to be discussed in detail with the various parties concerned.

DELIVERABLES:

Software for driving the prototyped 3D printer, demonstrating operation (done in conjunction with project partner)

SKILLS/REQUIREMENTS:

Programming / device driver coding; Mechatronics / control;

EXTRA INFORMATION:

AREA:

Computer Engineering  / Mechatronics

ID:

SW-15

TITLE:

 “Bonsai House” – Bonsai greenhouse environment control & monitoring system

DESCRIPTION:

This project concerns the development of a miniature, environment controlled greenhouse. The system worked by opening/closing vents, activating/deactivating fats, turning on/off a mini heating device to swarm the enclosure. The control system can be implemented as a PC application that, e.g., controls the actuators and reads sensors via a parallel printer port (a USB to LPT printer interface is available for this purposes). The application also needs to log events and keep track of power usage (measuring power consumption doesn’t need to be done directly, it can be based on the amount of time spent activating a device and how long the heater was on for). This is a generally low-current system using max. 12V DC. See illustration below.

DELIVERABLES:

Mini greenhouse structure. Control platform and control software.

SKILLS/REQUIREMENTS:

Programming, embedded systems. Mechanical construction.

EXTRA INFORMATION:

More info about planning & building a large scale greenhouse can be found at the following link, not all applies to a bonsai greenhouse: http://www.wvu.edu/~agexten/hortcult/greenhou/building.htm

AREA:

Mechatronics

ID:

SW-16

TITLE:

WPGC – Wireless Pong Game Controlled
(An embedded system project theme)

DESCRIPTION:

This topic is based on developing two controllers that will be used to play the pinball game on the laptop. Both the controllers and a graphics game application need to be designed, implemented and tested. The suggested game is Pong, a game for which each player has a controllable paddle to defend their wall – if the ball hits a player’s wall, the other player wins a point. The program will interact with the controller via infrared connection to a COM port. The controller will have the following basic buttons shown below.

This project is intended to follow a research approach, in which a literature review will need to be done to decide methods to ergonomically design the controller, test the interfaces, perform surveys and the like in order to put together a topic quality report.

DELIVERABLES:

Pong controller, Pong game that works with the controller, Surveys completed by testers

SKILLS/REQUIREMENTS:

Mechanical design, Programming, Hardware/Software interfacing.

EXTRA INFORMATION:

Reserved for Mike Dlulane

AREA:

Mechatronics / computer engineering

ID:

SW-18 

TITLE:

VTBA – Virtualization Technologies Benchmarking Analysis

DESCRIPTION:

This project concerns Virtualization Technologies, staring with a literature-based analysis of existing implementations. Building on this, the student is to determine the performance penalties associated with Virtualization over an unstructured cluster management approach by means of comparative benchmarking.

The proposed hypothesis is that although overheads (e.g., hypervisors and network management) exist, their impact can be effectively minimized to the point where the administrative and management advantages of Virtualization outweigh the performance cost.  The  benchmarking  process  will  be  conducted  on  a  HPC  cluster  in  ACE  Lab  at  the  Centre  for  High

Performance Computing (CHPC) Rosebank campus.

The testing process will be broken up as follows:

1.   Produce a software stack for the HPC cluster.

2.   Benchmark the cluster to ascertain a performance baseline.

3.   Deploy an appropriate implementation of Virtualization Technology onto the cluster.

4.   Reassess the performance of the cluster.

5.   Determine the resulting efficiency using several metrics (e.g. throughput, communication latency).

6.   Compare the performance penalty of Virtualization versus the hardware cost of the tradition approach.

DELIVERABLES:

Benchmarking implementation structure and code repository. Performance comparison report.

SKILLS/REQUIREMENTS:

Programming / parallel computing

EXTRA INFORMATION:

Reserved for Matthew Cawood

AREA:

HPC

ID:

SW-20 l

TITLE:

LURCCI – Level-floor Undercover Robot Crawler Controlled by Internet (phase 1)

DESCRIPTION:

The plan for the LURCCI project is to develop a robot crawler that is controlled remotely via internet, intended for moving around indoors on even floors. The LURCCI robot can be built from a do-it-yourself robotics kit, which includes the chassis, and drive mechanism for moving and steering the robot – together this provides a platform on which further functionality is built. Other features would be needed to make the robot more useful. This project is design around multiple phases, each phase could be done by a different student working in parallel or in subsequent years.

This is the first time this project is being offered, and consequently, phases 1 and 2 are the requirements for this edition of the project. However, the full set of phases for the robot can be sent to you on request.

Phase 1: Assembling the robot kit, getting the platform together and tested. Control movement of platform via a RS2332 tether. Testing speed, manoeuvrability, battery life.

Phase 2: Vision sensor. Adding 1x camera to front of robot which will be used in later projects to enable remote control. A webcam for the first prototype or a small COTS CCD camera kit can be used (ideally this camera should be hooked up to a microcontroller running on the robot, but due to time constrains this may need to be done by a future student working taking the project further).

DELIVERABLES:

Prototyped LURCII able to move around via manual PC control

SKILLS/REQUIREMENTS:

Mechatronics, programming

EXTRA INFORMATION:

AREA:

Mechatronics

ID:

SW-21 l

TITLE:

SPI-Ladder: an embedded system rapid prototyping strategy

DESCRIPTION:

The SPI-Ladder project focuses on developing an embedded system rapid prototyping platform design in order to construct and test products constructed from a set of SPI system on chip (SoC) components (see illustration below). Nowadays, SPI components are  widely accessible and low cost. The ease of the SPI protocol, and the fairly fault-tolerant communications system built into most of these SoCs, together with the simple hardware wiring, makes SPI an ideal interfacing system and for a variety of electronic applications. 
The SPI ladder design involves two parts: 1) the hardware side comprising of a number of cicruit boards (or 'board levels') and 2) the software side that comprises a very simple and easy-to-use C-based framework for a PIC processor. The two parts are elaborated below:

• Hardware: a PIC processor and at board level 0 (see diagram below) and a collection of SPI modules (board level 1 and above), where each board level contains a SPI SoC module that performs a particular hardware service (e.g., a SPI ADC to provide analogue sampling). Each board level 1 and above includes a DIP switch which is used to indicate the board number in binary.
• Software: a set of software C code modules will be needed in order to test and evaluate this rapid prototyping system. This code can be optimised and tidied-up to serve as a coding framework to facilitate future use of the system.

Figure: Concept sketch for SPI-Ladder prototyping system

Development and testing plans: as the figure above indicates, few electronic parts are expected to be necessary, although there may be a need to convert the 5V input to other levels depending on the PIC processor and SoCs chosen for testing. As illustrated, molex connectors are suggested as a means to both conenect comms and power between board levels as well as a means to hold the boards together.

DELIVERABLES:

PCB / circuit board. Considering the simplicity of the design, it is likely that veriboard can be used to construct the prototyped board levels, although doing so may need a different type of connector (i.e. other than molex) between levels, possibly just simply soldering separate wires.

The research-based part of the project can involve analysing speeds and determining to what expect this proposed system is actually usable. This would be written up in your thesis.

SKILLS/REQUIREMENTS:

Embedded systems development, circuit design and prototyping, C programming

EXTRA INFO:

AREA:

Embedded Systems

ID:

SW-22 l

TITLE:

Aerofoil Fluid Flow Simulation (AFFS)

DESCRIPTION:

Development of a scientific modelling application for specifying a variety of parameters such as aerofoil dimensions, wind and movement direction, attitude. The student would need to develop a library of aerofoil structures that users can load, modify and run through the simulator using a variety of conditions. Note that this application is not expected to be highly comprehensive giving very accurate results; there are existing modelling programs to do this (which cost quite a bit) including MatLab’s fluid flow libraries that provide many of the underlying functions. The diagram below illustrates aerofoil cross sections and a selection of relevant parameters.

Figure: Aerofoils and fluid flow of air movement around them

The focus is on approximated results, using mostly static parameters; for example when a helicopter takes off, there are complex ground effect parameters that have very dynamic conditions together with many fine control adjustments taking place – but this sort of comprehensive simulation won’t be done. Rather, two input file formats need to be developed: one to describe the aerofoil, the other to describe the airflow and simulation parameters. The program needs to output simulation results indicating for example pulling, pushing forces vectors, overall lift force, vibration.

DELIVERABLES:

Simulation application, short user manual, description of aerofoil simulation file formats, tutorial giving example for using the system.

SKILLS/ REQUIREMENTS:

Signal processing, MPI, OCTAVE or C/C++ programming

EXTRA INFOR:

AREA:

Compute Engineering / High performance computing

ID:

SW-23 l

TITLE:

BEC - Blocks to Embedded C code in a visual way

(Alternate title: An experimental in visualizing and generating parallel code)   (a community support theme)

DESCRIPTION:

This project focuses on transforming a block diagram into C code templates that an embedded software programmer can use to experiment with communication interfaces and data flows between parts of an embedded program. This automated C code file generation would saves time for the programmers and provides a C-code view of communication links modelled. While this project may seem like a lot of work, much of this effort has already been provided and is easily accessible in terms of drawing models and translating them to text. Specifically, the Institute for Software Integrated Systems (ISIS) has developed a highly customizable 'generic modelling environment' (GME) that can be used to create customised visual models (e.g., block & line diagrams) that can be automatically converted into a other forms (e.g. C code or XML).

Figure: Example BEC model

Model Integrated Computing (MIC) has become an essential means to increase the speed and customizability of creating complex products. Examples of MIC applications includes Altera Quartus II (in which a block diagram can be used to model hardware and then “interpreted” in order to synthesise the hardware) and MatLab Simulink (e.g., in which a signal process routine is modelled visually and then synthesised as a program or even a HDL description of hardware). For more information see http://www.isis.vanderbilt.edu/research/MIC). 

DELIVERABLES:

·         Specification of the proposed modelling language (include in thesis write-up)

·         Design of model interpreter (flowcharts, procedure for how the model is converted into C code that can be compiled & executed)

·         A prototyped model interpreter built using the GME environment (only needs to handle a subset of the language)

SKILLS/REQUIREMENTS:

Good C++ programming; understanding of parallel programming

EXTRA INFORMATION:

AREA:

Parallel programming

ID:

SW-24 l

TITLE:

ESPPA - Embedded Systems Past Projects Archive
(a community support theme)

DESCRIPTION:

The EEE3074W course, which some of you may have been through and remember, involves an embedded systems prototyping project. From these prototype projects, lots of useful code and information is found related to the platforms used in the course. This project is about developing a web-based archive and search feature that could be used to make better use of these resources. For a sample starting point, which has already been put together, see the EEE3074W Past Projects Archive.

DELIVERABLES:

Online and searchable archive populated with a selection of past projects.

SKILLS/REQUIREMENTS:

Understanding of embedded systems coding (so that you can understand how to organise the data), database design; Data mining; CGI/PHP scripting or web server programming.

EXTRA INFORMATION:

AREA:

Embedded systems; Data mining

ID:

SW-25 l

TITLE:

NPBBS – Number Plate Based Billing Parking
(An image processing theme)

DESCRIPTION:

This project focuses on developing an image processing system that can detect car number plates in a photo and output the number as a string of characters. This system needs to have a well-defined interface (e.g. socket-based interface) so that it can be integrated quickly with other processing systems (e.g. for use with a car parking and payment system).

The objective is to prototype a system that could be used for billing people for parking without having to use parking tickets.

DELIVERABLES:

Operational NPBBS prototype

SKILLS/REQUIREMENTS:

Understanding of signal processing techniques. Numerical methods. TCP/IP sockets programming.

EXTRA INFORMATION:

AREA:

Signal processing, Image processing, network service programming

ID:

SW-26 l

TITLE:

Sound Guard

DESCRIPTION:

This project involves prototyping an embedded system product. The ‘sound guard’ product is intended to be a small, low power device that listens in to an environment. It characterises usual sounds of the environment based on time of day. It continuously maintains a recorded history from a few minutes ago. Unusual sounds, or trigger events (such as an explosion or door opening at an unusual time of night) has its past few minutes of recorded sounds saved and an alarm condition is set. For this prototype, the alarm could just be sending a message over a serial port – a refined version could transmit a wireless alarm or Internet message that includes the device’s location information and the past few minutes of recorded sound.

DELIVERABLES:

 Prototype

SKILLS/REQUIREMENTS:

Programming, embedded systems

EXTRA INFORMATION:

AREA:

Computer Engineering