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Abstract:
Ground penetrating radar technology is used to provide a fast and accurate method for target location compared to other geophysical sensing techniques. An existing ground penetrating radar system developed by OpenFuel (Pty) Ltd is used in the detection and avoidance of obstacles for a sub-surface horizontal directional drill mechanism. This GPR system could be implemented as a portable surface-based version of the system for geophysical applications. A factor limiting its implementation is a personal or laptop computer required to execute the human-machine interface software package for the radar system. Thus, there exists a need to produce a radar user interface to replace the computer required by the current GPR system, while maintaining the original functionality of the radar system.
The purpose of this design project was to develop a user interface for a GPR system in hardware. The radar user interface had to allow for the autonomous operation of the GPR system and the human-machine interface application software.
The objectives of the design project were to initially review existing GPR systems, generate a system specification for the radar user interface and then identify a suitable implementation technology for the radar user interface. From this we would then proceed to design the hardware for the radar user interface and finally verify, test and integrate the raadr user interface hardware.
The review of existing GPR technology showed that integrating the human-machine interface and the radar electronics was the optimum design concept to implement. We generated the system specification for the radar user interface with this design concept and the current GPR electronics system specification in mind. A survey of the current processor technology in the semiconductor industry showed us that system-on-chip processor technology would be the ideal solution for the radar user interface as it provided low-power consumption, increased operating speed, reduced size and complexity, lower manufacturing costs and increased system reliabiilty of the end-user product. From a survey of the available system-on-chip processors we selected the AMD Alchemy AU1100 MIPS32-Based processor as it had the lowest power consumption versus relative speed of all processors reviewed.
A concept design for the radar user interface was done based on the system specification and the system-on-chip processor selected. The hardware design of the radar user interface was done by initially selecting the required components, capturing the schematic diagrams based on the concept design and the components selected and then the printed circuit boards were designed from these schematic diagrams.
The required software and firmware to test the radar user interface was designed and implemented. The hardware for the radar user interface was verified and tested and then integrated with the software and firmware developed for testing. The test software and firmware were then verified and found to be operating as required. The radar user interface was then tested with the test software and firmware and compared with the user requirements and the system specification to verify that the objectives of the design project had been reached.
In conclusion, the purpose and objectives of the design project had been satisfied as a radar user interface for a GPR system had been developed successfully.
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Abstract:
This thesis provides an intensive literature review of bistatic and multistatic systems. The thesis also investigates the use of a television signal as the radar's transmitted pulse for airborne detection. This thesis also describes a SNR simulator which was created for signal magnitude detection, as well as a receiver system which was designed for target detection.
This dissertation is presented to introduce the reader to the techniques used and the technology of a Television Based Bistatic Radar system. Technology such as this one makes use of a non-cooperative television transmitter as an illuminator for the bistatic radar system investigated. Both technical and theoretical information about the topic will be introduced.
The dissertation starts off with a brief introduction to its structure, and evolves into a historical overview of multistatic and bistatic radars. Certain techniques about bistatic radars used in the past will be discussed; their advantages and disadvantages of the various techniques will also be shown. The geometrical design and the various effects of the bistatic radar arrangement will be discussed.
A simulator created to plot various SNR patterns over the Western Cape was also developed to estimate the input SNR value received at the receiver. This simulator is flexible in the sense that the transmitter and receiver locations can be arbitrarily placed around the Western Cape. The estimated SNR values for different ranges are then plotted over the mapped area. Not only does the simulator show the SNR plots, it also indicates the coverage area of both the receiver and the transmitter. The target flight path of aircrafts flying into Cape Town can also be included in the simulation.
This dissertation will then focus on the actual simulation of the receiver designed for the purpose of airborne target surveillance. These simulations involves actual receiver components used at the system level, with the created television input signal, as well as recorded data. The discussion will then focus on the use of an ordinary pc TV-card which was used as a receiver, whereby measurements were taken for actual targets landing into Cape Town International Airport. These target signals were recorded and analysed. A discussion surrounding this topic was included for the ambiguity analyses of the recorded data.
This dissertation is concluded by discussing the conclusions of the research as well as making some recommendations for future work which could be done to improvement the measured results for a television based bistatic radar system.
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Abstract:
The purpose of this dissertation is to introduce the reader to the radar antenna for SASARII. The dissertation describes the design process, implementation and testing of the radar antenna.
The dissertation starts off by listing all the user requirements that need to be met by the radar antenna for SASARII. The pillbox antenna is introduced as the antenna of choice. The pillbox or cheese antenna as it is also known is then defined and the history of the antenna and the advantages of using the antenna are also given. The design theory necessary for the construction of the antenna is also given.
The dimensions of the feed horn and the dimensions of the aperture to achieve the required beamwidths in the principal E and H-planes are given. The offset-fed pillbox is chosen as the configuration for the antenna. The far-field power patterns of the feed and the antenna are simulated in MATLAB and the directivity of the antenna is calculated.
The antenna tests which include power gain, 3 dB beamwidth, return loss and crosspolarization measurements are discussed. The test results are analyzed and compared to the simulations and theoretical predictions to measure the performance of the antenna.
This dissertation winds up by discussing the conclusions to the research problem and giving suggestions for future improvements to the design.
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Abstract:
Digital systems pervade the world around us. The interface between analogue data sources and digital systems are the realm of analogue to digital converters (ADCs) that acquire digital snap-shots of data for further processing. Some applications require high sampling rates or high resolution data (or both). In addition to this, certain applications require the capture of large amounts of data.
A good example of an application requiring a high sampling rate and high resolution rate, is a digital spectrum analyser used to analyse large bands of a spectrum and offer precise results. Radar systems such as synthetic aperture radars use post-processing techniques on large quantities of data. A deevlopign field requiring versatile data capture systems is that of software defined radio (SDR). It is "a collection of hardware and software technologies that enable reconfigurable system architectures for wireless networks and user terminals."
This document gives details on a project to build a high speed, high resolution data acquisition system that is capable of performing to some of the most stringent requirements. Specifically this thesis documents the design, implementation and testing of firmware implemented in an FPGA in a commercial data capture card as part of the system. This firmware would facilitate the real-time transfer of captured data to RAM in a host PC.
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